1. Field of the Invention
The present invention relates generally to integrated circuits, and more particularly but not exclusively to power on reset circuits.
2. Description of the Background Art
A power on reset circuit (POR) prevents invalid conditions in an electrical circuit by ensuring that the electrical circuit has sufficient power before it is initialized or allowed to operate. In an integrated circuit device, for example, a POR circuit may be employed to ensure that sufficient power supply voltage is available to the device before the device is initialized or enabled. Otherwise, the POR circuit may keep the device disabled. A POR circuit thus allows the device to power up correctly after a shutdown, for example.
FIG. 1 schematically shows an example POR circuit. In the example of FIG. 1, the resistor ladder comprising resistors R1 and R2 scales the voltage of a power supply Vdd. A resistor R3 pulls up the input of an inverter 103 when a transistor Q1 is OFF, such as when Vdd is too low to generate sufficient voltage across the resistor R2. Upon power up, Vdd increases to a point where the voltage across resistor R2 is sufficient to turn ON the transistor Q1. At that point, referred to as “trip point,” the transistor Q1 pulls the input to the buffer formed by inverters 103 and 104 to ground, deasserting the power on reset signal at the output of the inverter 104. In the example of FIG. 1, the power on reset signal is active high and asserted at low Vdd to initialize the device.
A POR circuit may also be used as a low voltage detector after the power ON event. For example, when Vdd subsequently falls below the trip point, the POR circuit of FIG. 1 may again assert the power on reset signal to re-initialize the device.
Achieving low power consumption in integrated circuit devices becomes more important as battery powered devices become more popular. For example, it is desirable to minimize power consumption when a device enters sleep mode, which is characterized by a relatively long period of time when the device is essentially inactive. Because a POR circuit is for the most part inactive except during power up, it is desirable to disable the POR circuit after the power up sequence. One problem with disabling a POR circuit is that it is difficult to ensure that the POR circuit is enabled during power up. If the device is not enabled during power up, device failure can result.